During CXL DevCon 2024, XConn Technologies revealed that they will feature the initial production samples of their pioneering CXL 2.0 interconnect solution.
Crafted to expedite system design and propel the advancement of AI-driven computing, the XConn “Apollo” CXL 2.0 switch has emerged as the benchmark solution that stands as the industry first and only. It caters to environments seeking to capitalize on a CXL Memory Pool, aiming to eliminate conventional memory constraints and redefine memory architecture. This interconnect stands as the cornerstone of systems and solutions developed throughout the CXL ecosystem, featuring partners such as Samsung, Montage, Micron, and numerous others.
“XConn is proud to be at the center of the CXL movement, delivering the interconnect technology necessary to make the adoption of CXL a reality,” said Gerry Fan, CEO, XConn. “Now, as we roll out our early production samples, XConn is demonstrating the power of CXL in practice so that system manufacturers across the industry can seamlessly integrate CXL into their solutions for AI workloads.”
“Samsung has developed an integrated solution (CMM-B) to deliver the power of CXL to support the demanding memory requirements of next-generation applications with XConn CXL switch SoC,” said Dr. Sungwook Ryu, Head of Samsung Semiconductor Memory Solutions Lab. “It further underscores our belief in the CXL specification for higher performance computing with reduced software stack complexity and lower overall system cost.”
“XConn’s groundbreaking work in CXL interconnect technology is crucial for propelling computing capabilities, especially in the realm of data pooling and aggregation,” highlighted Stephen Tai, President of Montage Technology. “Aligned with the entire CXL community, we are steadfast in our commitment to advancing CXL’s adoption as the pivotal technology driving an AI-centric future.”
“With the increasing use and evolution of AI, the need for memory-centric data infrastructure becomes ever more vital,” said Charles Fan, CEO and co-founder, MemVerge. “CXL technology is transforming the industry with memory fabric for the future of computing. The combination of Memory Machine X and the innovative XConn Apllo switch makes scalable memory capacity a reality for tomorrow’s generation of AI applications.”
The XConn Apollo switch is innovative in its design, offering system developers the opportunity to future-proof devices to capitalize on the breakthrough performance of new CXL interconnect technology with the industry first and only CXL 2.0 switch, while also supporting PCIe 5.0 standards. Both PCIe and CXL can now be supported in a single design. With 2,048 GB/s of total bandwidth and 256 lanes, the chip offers unprecedented flexibility for system designers that want to capitalize on JBOG (Just-a-Bunch-Of-GPUs) and JBOA (Just-a-Bunch-Of-Accelerators) processing configurations.
Available now in early production samples, XConn Apollo delivers full support for CXL 2.0, is backwards compatible with CXL 1.1 and supports PCIe Gen 5 in hybrid mode. For the industry first and only CXL 2.0 interconnect solution sample and/or Apollo reference board, visit the website here.
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