XConn Technologies announced next-generation interconnect technology for the future of high-performance computing and AI applications as the first to demonstrate the complete Compute Express Linkâ„¢ (CXLâ„¢) 2.0 ecosystem, from end-to-end. The demonstration, to be featured at Intel Innovation, will showcase, for the first time, the CXL 2.0 specification in action, from host to device, for the ability to scale up to 15 TB to support “Just a Bunch of Memory” (JBOM) applications needed by HPC and AI environments.
The XConn Apollo Switch which supports CXL 2.0 interoperates with Samsung DRAM Memory Expander supporting CXL, Micron CZ120 memory expansion module, Memory eXpander Controller (MXC) for CXL from Montage Technology, and the high-speed CPU interconnect (CMM) for CXL from Smart Modular Technologies. The Apollo switch is the industry’s first and only hybrid CXL 2.0 and PCIe Gen 5 interconnect solution. On a single 256-lane SoC, the XConn switch offers the industry’s lowest port-to-port latency and lowest power consumption per port in a single chip at a low total cost of ownership.
“The XConn demo during Intel Innovation is the first true realization of the CXL 2.0 specification in action validating the remarkable potential of CXL as it increases memory utilization efficiency and provides true memory capacity on demand,” said Gerry Fan, CEO, XConn. “With our Apollo switch, environments can truly take advantage of CXL 2.0 to exponentially scale to support even the most memory intensive HPC and AI applications.”
The Apollo switch is a hybrid interconnect solution supporting CXL 1.1 and 2.0 as well as PCIe Gen 5 specifications in the same system. This flexibility offers system designers unprecedented flexibility to support every application need with a single chip.
“We are delighted at XConn’s contribution to the CXL ecosystem,” said Jim Pappas, director of Technology Initiatives Intel Corporation. “Their end-to-end CXL 2.0 demonstration underscores the dramatic potential of CXL to meet the increasing performance demands of next-generation data centers.”
“Samsung has collaborated with XConn in the development of advanced CXL solutions and is actively involved in the CXL 2.0 ecosystem that is architecting new memory capacity expansion solutions that optimize cost and performance for tomorrow’s most demanding applications,” said Jangseok (JS) Choi, vice president of New Business Planning Team at Samsung Electronics. “Together with XConn, we are helping the industry’s use of CXL become realized.”
“Micron and XConn have been expanding the relevance of the XConn CXL 2.0 switch features to emerging applications,” said Siva Makineni, vice president of Micron’s Advanced Memory Systems. “Our continued collaboration to lead innovative technologies underpin the impact CXL 2.0 will have in next-generation computing systems.”
“We’re pleased to see XConn bring together a complete ecosystem of CXL 2.0 innovators to illustrate the value of CXL for the future of processing,” said Larrie Carr, president, CXL Consortium.
The XConn Apollo XC50256, which features full support for CXL 2.0, is backwards compatible with CXL 1.1 and supports PCIe Gen 5 in hybrid mode, is available now. For customer samples and/or Apollo reference boards, contact XConn at the website HERE.
With 256-lanes, Apollo also supports PCIe Gen 5 mode for AI-intensive applications and is a key component for the future Intel Xeon processors in JBOG and JBOA environments.
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World’s First Hybrid CXL 2.0 and PCIe Gen5 Switch Launched by XConn
2TB Pooled CXL Memory System Unveiled by Samsung, MemVerge, H3 Platform, and XConn